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专利名称：Processor, Method and Computer Program发明人：Kazunori Asanaka申请号：US12529184申请日：20080320
公开号：US20100095091A1公开日：20100415
专利附图：
摘要：To accelerate processing speed of a processor while keeping increased
complexity in the processor's circuitry to a minimum. A processor is offered, comprising adecoder which sequentially acquires and decodes an instruction from a program,
including an instruction of a first type and a second type, which are classified according to
a property of data upon which the instruction is to operate; a first operation unit whichsequentially receives from the decoder, and executes, the instruction of the first type; anoperand processing circuit which substitutes a variable value, which is set into a registerthat is associated with the first operation unit, and which is included within an operand ofthe instruction of the second type, with a constant; a buffer which queues the instructionof the second type that has been decoded by the decoder, and the operand thereof hasbeen substituted by the operand processing circuit; and a second operation unit whichsequentially receives from the buffer, and executes, the instruction of the second type.Methods and computer program for implementing the methods are also disclosed.
申请人：Kazunori Asanaka
地址：Yokohama JP
国籍：JP
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