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MEMORY存储芯片TMS320DM46BZWT8中文规格书

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TMS320C6745,TMS320C6747

SPRS377F–SEPTEMBER2008–REVISEDJUNE2014

Table3-25.GeneralPurposeInputOutputTerminalFunctions(continued)

SIGNALNAME

PINNOPTP-132166165-163-168169170171173174175176160858723161413912111817

ZKBGP4

USB0_DRVVBUS/GP4[15]AMUTE1/EPWMTZ/GP4[14]AFSR1/GP4[13]

ACLKR1/ECAP2/APWM2/GP4[12]AHCLKR1/GP4[11]

AFSX1/EPWMSYNCI/EPWMSYNCO/GP4[10]AXR1[9]/GP4[9]

AXR1[8]/EPWM1A/GP4[8]AXR1[7]/EPWM1B/GP4[7]AXR1[6]/EPWM2A/GP4[6]AXR1[5]/EPWM2B/GP4[5]AXR1[4]/EQEP1B/GP4[4]AXR1[3]/EQEP1A/GP4[3]AXR1[2]/GP4[2]AXR1[1]/GP4[1]AXR1[0]/GP4[0]

EMB_WE_DQM[0]/GP5[15]EMB_WE_DQM[1]/GP5[14]SPI1_SCS[0]/UART2_TXD/GP5[13]SPI1_ENA/UART2_RXD/GP5[12]AXR1[11]/GP5[11]AXR1[10]/GP5[10]

UART0_TXD/I2C0_SCL/TMP0_OUT12/GP5[9]/BOOT[9]UART0_RXD/I2C0_SDA/TMP0_IN12/GP5[8]/BOOT[8]SPI1_CLK/EQEP1S/GP5[7]/BOOT[7]SPI1_SIMO[0]/I2C1_SDA/GP5[6]/BOOT[6]SPI1_SOMI[0]/I2C1_SCL/GP5[5]/BOOT[5]

SPI0_SCS[0]/UART0_RTS/EQEP0B/GP5[4]/BOOT[4]SPI0_ENA/UART0_CTS/EQEP0A/GP5[3]/BOOT[3]SPI0_CLK/EQEP1I/GP5[2]/BOOT[2]SPI0_SIMO[0]/EQEP0S/GP5[1]/BOOT[1]SPI0_SOMI[0]/EQEP0I/GP5[0]/BOOT[0]

E4D4L3L2L1K4M1M2M3M4N1N2P1P2R2T3GP5

K14C15P4R4T4N3R3P3T6N5P5N4R5T5P6R6

OOOII/OI/OIOII/OI/OIIIII

IPUIPUIPUIPUIPUIPUIPUIPUIPDIPUIPUIPUIPUIPDIPDIPD

EMIFBSPI1,UART2McASP1UART0,I2C0,BOOTSPI1,eQEP1,BOOTSPI1,I2C1,BOOTSPI0,UART0,eQEP0,BOOTSPI0,eQEP1,BOOTSPI0,eQEP0,BOOT

GPIOBank5

OOI/OI/OI/OI/OI/OI/OI/OI/OI/OI/OI/OI/OI/OI/O

IPDIPDIPDIPDIPDIPDIPDIPDIPDIPDIPDIPDIPDIPDIPDIPD

McASP1USB0McASP1,eHRPWM0,eHRPWM1,eHRPWM2McASP1McASP1,eCAP2McASP1McASP1,eHRPWM0McASP1McASP1,eHRPWM1AMcASP1,eHRPWM1BMcASP1,eHRPWM2AMcASP1,eHRPWM2BMcASP1,eQEP

GPIOBank4

TYPE(1)

PULL(2)

MUXED

DESCRIPTION

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TMS320C6745,TMS320C6747

SPRS377F–SEPTEMBER2008–REVISEDJUNE2014

5.3

CVDD

RecommendedOperatingConditions

MIN

Supplyvoltage,Core(CVDD,PLL0_VDDA)

(1)

NOM1.21.31.21.31.21.31.83.30

MAX1.321.351.321.351.321.351.3.450

UNITVVVVVVVV

375MHzversions456MHzversion375MHzversions456MHzversion375MHzversions456MHzversion

1.141.250.90.91.141.251.713.002

0.7*RTC_CVDD0.7*CVDD

RTC_CVDDRVDD

SupplyVoltage,RTCCoreLogic

SupplyVoltage,InternalRAM

DVDD

Supplyvoltage,I/O,1.8V

(USB0_VDDA18,USB1_VDDA18)Supplyvoltage,I/O,3.3V

(DVDD,USB0_VDDA33,USB1_VDDA33)Supplyground

(VSS,PLL0_VSSA,OSCVSS(2),RTC_VSS(2))High-levelinputvoltage,I/O,3.3VHigh-levelinputvoltage,RTC_XIHigh-levelinputvoltage,OSCINLow-levelinputvoltage,I/O,3.3V

VSS

VIH

(3)

0.80.3*RTC_CVDD0.3*CVDD

160

4.75

5

5.250.25Por10(4)

0-40-40-400000

707085105375/4556375375

VVmVVns°C°C°C°CMHzMHzMHzMHz

VIL

(3)

Low-levelinputvoltage,RTC_XILow-levelinputvoltage,OSCINInputHysteresisUSB0_VBUS

Transitiontime,10%-90%,AllInputs(unlessotherwisespecifiedintheelectricaldatasections)

CommercialIndustrial(Dsuffix)Extended(Asuffix)Automotive(Tsuffix)Commercial

DSP

OperatingFrequency(SYSCLK1)

Industrial(Dsuffix)Extended(Asuffix)Automotive(Tsuffix)

VHYSUSBtt

TA

Operatingambienttemperaturerange

FSYSCLK1,6

(1)(2)(3)(4)

TheRTCprovidesanoptionforisolatingtheRTC_CVDDfromtheCVDDtoreducecurrentleakagewhentheRTCispowered

independently.Ifthesepowersuppliesarenotisolated(CTRL.SPLITPOWER=0),RTC_CVDDmustbeequaltoorgreaterthanCVDD.Ifthesepowersuppliesareisolated(CTRL.SPLITPOWER=1),RTC_CVDDmaybelowerthanCVDD.

Whenanexternalcrystalisused,oscillator(OSC_VSS,RTC_VSS)groundmustbekeptseparatefromothergroundsandconnecteddirectlytothecrystalloadcapacitorground.ThesepinsareshortedtoVSSonthedeviceitselfandshouldnotbeconnectedtoVSSonthecircuitboard.Ifacrystalisnotusedandtheclockinputisdrivendirectly,thentheoscillatorVSSmaybeconnectedtoboardground.Unlessspecificallyindicated,theseI/OspecificationsdonotapplytoUSBI/Os.USB0I/OsadheretoUSB2.0specification.USB1I/OsadheretoUSB1.1specification.

Whicheverissmaller.P=theperiodoftheappliedsignal.Maintainingtransitiontimesasfastaspossibleisrecommendedtoimprovenoiseimmunityoninputsignals.

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